HD6433044 Datasheet, PDF (587/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

18.5.3 Erase Block Register 2
Erase block register 2 (EBR2) is an eight-bit register that designates small flash-memory blocks
for programming and erasure. EBR2 is initialized to H'00 by a reset, in the standby modes, when
12 V is applied to V_PP while the V_PPE bit is 0, and when 12 V is not applied to V_PP. When a bit
in EBR2 is set to 1, the corresponding block is selected and can be programmed and erased.
Figure 18-8 shows a block map.
Bit
Initial value^*
R/W
7
SB7
0
R/W^*
6
SB6
0
R/W^*
5
SB5
0
R/W^*
4
SB4
0
R/W^*
3
SB3
0
R/W^*
2
SB2
0
R/W^*
1
SB1
0
R/W^*
0
SB0
0
R/W^*
Note: * The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled). In modes
1, 2, 3, and 4 (on-chip flash memory disabled), this register cannot be modified and is
always read as H'FF.
Bits 7 to 0—Small Block 7 to 0 (SB7 to SB0): These bits select small blocks (SB7 to SB0) to be
programmed and erased.
Bits 7 to 0
SB7 to SB0
0
1
Description
Block SB7 to SB0 is not selected
Block SB7 to SB0 is selected
(Initial value)
578