HD6433044 Datasheet, PDF (611/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

FLMCR:
EBR1:
EBR2:
TCSR:
.EQU
.EQU
.EQU
.EQU
FFFF40
FFFF42
FFFF43
FFFFA8
; Set R0 value
START: MOV.W
MOV.W
SUB.W
#FFFF, R6
R6,
R0
R1,
R1
; Select blocks to be erased (R6: EBR1/EBR2)
; R0: EBR1/EBR2
; R1L: used to test R1-th bit in R0
; #RAMSTR is starting destination address to which program is transferred in RAM
; Set #RAMSTR to even number
MOV.L #RAMSTR:32, ER2 ; Starting transfer destination address
ADD.L
#ERVADR:32, ER2 ; #RAMSTR + #ERVADR → ER2
SUB.L #START:32, ER2 ; ER2: address of data area used in RAM
PRETST: CMP.B
BEQ
CMP.B
BCC
BTST
BNE
BRA
BC0: BTST
BNE
#10,
R1L
ERASES
#08,
R1L
BC0
R1L,
R0H
PREWRT
PWADD1
R1L,
R0L
PREWRT
; R1L = #10?
; If finished checking all R0 bits, branch to ERASES
;
;
;
;
;
; Test R1-th bit in R0
; If R1-th bit in R0 is 1, branch to PREWRT
PWADD1: INC.B
MOV.L
BRA
R1L
@ER2+, ER3
PRETST
; R1L + 1 → R1L
; Dummy-increment ER2
; Execute prewrite
PREWRT: MOV.L
MOV.L
MOV.W
MOV.W
MOV.B
LOOPR0 DEC.W
BPL
MOV.W
@ER2+,
@ER2,
#g,
#4140,
R5L,
#1,
LOOPR0
R6,
ER3
; ER3: prewrite starting address
ER4
; ER4: top address of next block
E5
; Wait counter
R5
;
@FLMCR:8 ; Set V_PPE bit
E5
;
;
@EBR1:16 ; Set EBR (R6: EBR1/EBR2)
PREW: MOV.B
MOV.W
PREWRS: MOV.B
MOV.B
#01,
#a,
#00,
R5H,
R1H
E0
R5H
@ER3
; Prewrite-verify fail count
; Set initial prewrite loop counter value
;Write #00 data
;
MOV.W
MOV.W
MOV.W
MOV.W
MOV.B
#A579,
E5,
E0,
#4140,
R5H,
E5
;
@TCSR:16 ; Start watchdog timer
E1
; Set program loop counter
R5
;
@FLMCR:8 ; Set P bit
602