HD6433044 Datasheet, PDF (619/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

programming or erasing, or it may contain data that has been insufficiently programmed or erased
because of the suspension of these operations. Boot mode should be used to recover to a normal
state.
If the memory contains overerased memory cells, boot mode may not operate correctly. This is
because the H8/3048F’s built-in boot program is located in part of flash memory, and will not read
correctly if memory cells have been overerased.
18.7.9 NMI Input Masking
NMI input is disabled when flash memory is being programmed or erased (when the P or E bit is
set in FLMCR). NMI input is also disabled while the boot program is executing in boot mode,
until the branch to the on-chip RAM area takes place.*¹ There are three reasons for this.
• NMI input during programming or erasing might cause a violation of the programming or
erasing algorithm. Normal operation could not be assured.
• In the NMI exception-handling sequence during programming or erasing, the vector would
not be read correctly.*² The result might be a program runaway.
• If NMI input occurred during boot program execution, the normal boot-mode sequence could
not be executed.
NMI input is also disabled in the error-protect state while the P or E bit remains set in the flash
memory control register (FLMCR).
NMI requests should be disabled externally whenever V_PP is applied.
Notes: 1. The disabled state lasts until the branch to the boot program area in on-chip RAM
(addresses H'FFEF10 to H'FFF2FF) that takes place as soon as the transfer of the user
program is completed. After the branch to the RAM area, NMI input is enabled except
during programming or erasing. NMI interrupt requests must therefore be disabled
externally until the user program has completed initial programming (including the
vector table and the NMI interrupt-handling program).
2. The vector may not be read correctly for the following two reasons.
• If flash memory is read while being programmed or erased (while the P or E bit is
set in FLMCR), correct read data will not be obtained. Undetermined values are
returned.
• If the NMI entry in the vector table has not been programmed yet, NMI exception
handling will not be executed correctly.
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