HD6433044 Datasheet, PDF (636/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

t_VPS
Programming/
erasing
possible t_FRS
t_VPS
t_VPS
Programming/
erasing
possible t_FRS
Programming/
erasing
possible t_FRS
t_VPS
Programming/
erasing
possible
ø
2.7 to
5.5 V
V_CC
0 to
V_PP ^{Vcc V}
tosc1
12±0.6 V
min 0 µs
min 10 ø
MD2
to 0
12±0.6 V
0 to
Vcc V
RES
min 0µs
V_PPE bit
t_MDS
VppE
set
t_MDS*²
VppE
cleared _tFRS*2
Clear
VppE
Mode Boot mode
switch-
ing*¹
Mode User
switch- mode
ing*¹
Period during which flash memory access is prohibited
User program mode
User User program
mode mode
Period during which flash memory can be rewritten
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
Notes
1 When entering boot mode or making a transition from boot mode to another mode, mode switching must be carried
out by means of RES input. The pin output states change during this switchover interval (the interval during which
the RES pin is low), and therefore these pins should not be used as output signals during this time.
2 When making a transition from boot mode to another mode, the flash memory read setup time t_FRS and
mode programming setup time t_MDS must be satisfied with respect to RES clearance timing.
Figure 18-30 Mode Transition Timing
(Example: Boot Mode → User Mode ↔ User Program Mode)
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