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HD6433044 Datasheet, PDF (201/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer | |||
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8.1.3 Functional Overview
Table 8-1 gives an overview of the DMAC functions.
Table 8-1 DMAC Functional Overview
Transfer Mode
Short
address
mode
I/O mode
⢠Transfers one byte or one word
per request
⢠Increments or decrements the
memory address by 1 or 2
⢠Executes 1 to 65,536 transfers
Idle mode
⢠Transfers one byte or one word
per request
⢠Holds the memory address fixed
⢠Executes 1 to 65,536 transfers
Repeat mode
⢠Transfers one byte or one word
per request
⢠Increments or decrements the
memory address by 1 or 2
⢠Executes a specified number (1 to
255) of transfers, then returns to
the initial state and continues
Full
address
mode
Normal mode
⢠Auto-request
â Retains the transfer request
internally
â Executes a specified number
(1 to 65,536) of transfers
continuously
â Selection of burst mode or
cycle-steal mode
⢠External request
â Transfers one byte or one word
per request
â Executes 1 to 65,536 transfers
Block transfer
⢠Transfers one block of a specified
size per request
⢠Executes 1 to 65,536 transfers
⢠Allows either the source or
destination to be a fixed block
area
⢠Block size can be 1 to 255 bytes
or words
Address
Reg. Length
Activation
Destina-
Source tion
⢠Compare match/input 24
8
capture A interrupts
from ITU channels
0 to 3
⢠Transmit-data-empty
interrupt from SCI
channel 0
⢠Receive-data-full
8
24
interrupt from SCI
channel 0
⢠External request
24
8
⢠Auto-request
24
24
⢠External request
⢠Compare match/
24
24
input capture A
interrupts from ITU
channels 0 to 3
⢠External request
187
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