HD6433044 Datasheet, PDF (582/867 Pages) Hitachi Semiconductor – Hitachi Single-Chip Microcomputer

18.4.5 Input/Output Pins
Flash memory is controlled by the pins listed in table 18-9.
Table 18-9 Flash Memory Pins
Pin Name
Programming power
Mode 2
Abbreviation
V_PP
MD₂
Input/Output
Power supply
Input
Mode 1
MD₁
Input
Mode 0
MD₀
Input
Transmit data
Receive data
TXD₁
RXD₁
Output
Input
Function
Apply 12.0 V
H8/3048F operating mode
programming
H8/3048F operating mode
programming
H8/3048F operating mode
programming
Serial transmit data output
Serial receive data input
The transmit data and receive data pins are used in boot mode.
18.4.6 Register Configuration
The flash memory is controlled by the registers listed in table 18-10.
Table 18-10 Flash Memory Registers
Address
Name
Abbreviation
R/W
Initial Value
H'FF40
Flash memory control
register
FLMCR
R/W^*2
H'00^*1
H'FF42
H'FF43
Erase block register 1
Erase block register 2
EBR1
EBR2
R/W^*2
R/W^*2
H'00^*1
H'00^*1
H'FF48
RAM control register
RAMCR
R/W
H'70
Notes: 1. The initial value is H'00 in modes 5, 6, and 7 (on-chip flash memory enabled).
2. In modes 1, 2, 3, and 4 (on-chip flash memory disabled), this register cannot be
modified and is always read as H'FF.
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