XC3S100E_06 Datasheet, PDF (42/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

Functional Description
R
Data_in
Internal
DI _Memory
DO
Data_out = Data_in
CLK
WE
DI
ADDR
DO
0000
XXXX
aa
1111
bb
2222
cc
MEM(aa)
1111
2222
XXXX
dd
MEM(dd)
EN
DISABLED
READ
WRITE
MEM(bb)=1111
WRITE
MEM(cc)=2222
READ
DS312-2_05_020905
Figure 33: Waveforms of Block RAM Data Operations with WRITE_FIRST Selected
Setting the WRITE_MODE attribute to a value of
WRITE_FIRST, data is written to the addressed memory
location on an enabled active CLK edge and is also passed
to the DO outputs. WRITE_FIRST timing is shown in the
portion of Figure 33 during which WE is High.
Setting the WRITE_MODE attribute to a value of
READ_FIRST, data already stored in the addressed loca-
tion passes to the DO outputs before that location is over-
written with new data from the DI inputs on an enabled
active CLK edge. READ_FIRST timing is shown in the por-
tion of Figure 34 during which WE is High.
Data_in
Internal
DI _Memory
DO
Prior stored data
CLK
WE
DI
ADDR
XXXX
aa
1111
bb
2222
cc
XXXX
dd
DO
0000
MEM(aa)
old MEM(bb)
old MEM(cc)
MEM(dd)
EN
DISABLED
READ
WRITE
MEM(bb)=1111
WRITE
MEM(cc)=2222
READ
DS312-2_06_020905
Figure 34: Waveforms of Block RAM Data Operations with READ_FIRST Selected
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DS312-2 (v3.4) November 9, 2006
Product Specification