XC3S100E_06 Datasheet, PDF (118/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

R
DC and Switching Characteristics
Power Supply Specifications
Table 73: Supply Voltage Thresholds for Power-On Reset
Symbol
Description
Min
Max
Units
V_CCINTT
V_CCAUXT
V_CCO2T
Threshold for the V_CCINT supply
Threshold for the V_CCAUX supply
Threshold for the V_CCO Bank 2 supply
0.4
1.0
V
0.8
2.0
V
0.4
1.0
V
Notes:
1. V_CCINT, V_CCAUX, and V_CCO supplies to the FPGA can be applied in any order. However, the FPGA’s configuration source (Platform Flash,
SPI Flash, parallel NOR Flash, microcontroller) might have specific requirements. Check the data sheet for the attached configuration
source.
2. To ensure successful power-on, V_CCINT, V_CCO Bank 2, and V_CCAUX supplies must rise through their respective threshold-voltage ranges with
no dips at any point.
Table 74: Supply Voltage Ramp Rate
Symbol
Description
Min
Max
Units
V_CCINTR
Ramp rate from GND to valid V_CCINT supply level
0.2
50
ms
V_CCAUXR
Ramp rate from GND to valid V_CCAUX supply level
0.2
50
ms
V_CCO2R
Ramp rate from GND to valid V_CCO Bank 2 supply level
0.2
50
ms
Notes:
1. V_CCINT, V_CCAUX, and V_CCO supplies to the FPGA can be applied in any order. However, the FPGA’s configuration source (Platform Flash,
SPI Flash, parallel NOR Flash, microcontroller) might have specific requirements. Check the data sheet for the attached configuration
source.
2. To ensure successful power-on, V_CCINT, V_CCO Bank 2, and V_CCAUX supplies must rise through their respective threshold-voltage ranges with
no dips at any point.
Table 75: Supply Voltage Levels Necessary for Preserving RAM Contents
Symbol
Description
V_DRINT
V_DRAUX
V_CCINT level required to retain RAM data
V_CCAUX level required to retain RAM data
Notes:
1. RAM contents include configuration data.
Min
Units
1.0
V
2.0
V
118
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DS312-3 (v3.4) November 9, 2006
Product Specification