XC3S100E_06 Datasheet, PDF (117/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

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DS312-3 (v3.4) November 9, 2006
160 _{Spartan-3E FPGA Family:}
DC and Switching
Characteristics
0 _{Product Specification}
DC Electrical Characteristics
In this section, specifications may be designated as
Advance, Preliminary, or Production. These terms are
defined as follows:
Advance: Initial estimates are based on simulation, early
characterization, and/or extrapolation from the characteris-
tics of other families. Values are subject to change. Use as
estimates, not for production.
Preliminary: Based on characterization. Further changes
are not expected.
Production: These specifications are approved once the
silicon has been characterized over numerous production
lots. Parameter values are considered stable with no future
changes expected.
All parameter limits are representative of worst-case supply
voltage and junction temperature conditions. Unless other-
wise noted, the published parameter values apply to all
Spartan™-3E devices. AC and DC characteristics are
specified using the same numbers for both commercial
and industrial grades.
Absolute Maximum Ratings
Stresses beyond those listed under Table 72: Absolute
Maximum Ratings may cause permanent damage to the
device. These are stress ratings only; functional operation
of the device at these or any other conditions beyond those
listed under the Recommended Operating Conditions is not
implied. Exposure to absolute maximum conditions for
extended periods of time adversely affects device reliability.
Table 72: Absolute Maximum Ratings
Symbol
Description
Conditions
Min
Max
Units
V_CCINT
V_CCAUX
V_CCO
V_REF
V_IN(1,2,3)
Internal supply voltage
Auxiliary supply voltage
Output driver supply voltage
Input reference voltage
Voltage applied to all User I/O pins and
Dual-Purpose pins
I_IK
V_ESD
Voltage applied to all Dedicated pins
Input clamp current per I/O pin
Electrostatic Discharge Voltage
–0.5
1.32
V
–0.5
3.00
V
–0.5
3.75
V
–0.5
V_CCO + 0.5⁽¹⁾
V
Driver in a
Commercial
–0.95
4.4
V
high-impedance _Industrial
–0.85
4.3
V
state
All temp. ranges
–0.5
V_CCAUX+ 0.5⁽³⁾
V
–0.5 V < V_IN < (V_CCO + 0.5 V)
–
±100
mA
Human body model
–
±2000
V
Charged device model
–
±500
V
Machine model
–
±200
V
T_J
T_STG
Junction temperature
Storage temperature
–
125
°C
–65
150
°C
Notes:
1. Each of the User I/O and Dual-Purpose pins is associated with one of the four banks’ V_CCO rails. Keeping V_IN within 500 mV of the
associated V_CCO rails or ground rail ensures that the internal diode junctions do not turn on. Table 76 specifies the V_CCO range used to
evaluate the maximum V_IN voltage.
2. Input voltages outside the -0.5V to V_CCO + 0.5V voltage range are permissible provided that the I_IK input diode clamp diode rating is met and
no more than 100 pins exceed the range simultaneously.
3. All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) draw power from the V_CCAUX rail (2.5V). Meeting the V_IN max limit ensures
that the internal diode junctions that exist between each of these pins and the V_CCAUX rail do not turn on. Table 76 specifies the V_CCAUX
range used to evaluate the maximum V_IN voltage. As long as the V_IN max specification is met, oxide stress is not possible.
4. For soldering guidelines, see UG112: Device Packaging and Thermal Characteristics and XAPP427: Implementation and Solder Reflow
Guidelines for Pb-Free Packages.
© 2005-2006 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc.
All other trademarks are the property of their respective owners.
DS312-3 (v3.4) November 9, 2006
Product Specification
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