XC3S100E_06 Datasheet, PDF(200/231 Page) Xilinx, Inc – Configurable Logic Block (CLB)

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XC3S100E_06 Datasheet, PDF (200/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

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Pinout Descriptions

R

FT256 Footprint

Bank 0

1

2

3

4

5

6

7

8

9

10 11 12 13 14 15 16

A GND

TDI

INPUT

I/O

L17N_0

VREF_0

I/O

L17P_0

VCCAUX

I/O

INPUT I/O

I/O

L10P_0 L09N_0 L09P_0 VCCAUX I/O

GCLK8 GCLK7 GCLK6

I/O

L03N_0

VREF_0

I/O

L01N_0

TCK

GND

B

I/O

L01P_3

I/O

L01N_3

I/O

L19N_0

HSWAP

I/O

INPUT

VCCO_0 ÃÃ

I/O

L13P_0

Â

INPUT

L10N_0

GCLK9

GND

INPUT

ÃÃ

I/O

L05N_0

VREF_0

VCCO_0

I/O

L03P_0

I/O

L01P_0

TMS

INPUT

C

I/O

L02P_3

I/O

L02N_3

VREF_3

I/O

L19P_0

I/O

L18N_0

I/O

L18P_0

I/O

L15P_0

I/O

L13N_0

Â

I/O INPUT

L11P_0

GCLK10

L07N_0

INPUT

L07P_0

I/O

L05P_0

INPUT

L02N_0

INPUT

TDO

I/O

L19N_1

LDC2

I/O

L19P_1

LDC1

D

I/O

L05P_3

INPUT PROG_B VCCINT INPUT

L16P_0

I/O

L15N_0

I/O

L14N_0

VREF_0

I/O

L11N_0

GCLK11

I/O

VREF_0

I/O

L06P_0

I/O

L04P_0

INPUT

L02P_0

VCCINT

I/O

L18N_1

LDC0

I/O

L18P_1

HDC

INPUT

VREF_1

ÃÃ

E

I/O

L05N_3

VCCO_3

I/O

L03P_3

I/O VCCINT INPUT

L03N_3

L16N_0

I/O

L14P_0

I/O

L12P_0

I/O

L08P_0

GCLK4

I/O

L06N_0

I/O

I/O VCCINT L17P_1

L04N_0

Â

INPUT

VCCO_1

I/O

L17N_1

Â

F VCCAUX INPUT

I/O

L04P_3

Â

I/O

L04N_3

VREF_3

Â

INPUT

ÃÃ

GND

VCCO_0 I/O

L12N_0

I/O

L08N_0

GCLK5

VCCO_0

GND

I/O

I/O

I/O

I/O VCCAUX

L16N_1 L16P_1 L15P_1 L15N_1

G

INPUT

VREF_3

I/O

L07N_3

I/O

L07P_3

I/O

L06N_3

I/O VCCO_3

L06P_3

GND

GND

GND

GND

VCCO_1 INPUT

I/O

L14P_1

I/O

L14N_1

A0

I/O

L13P_1

A2

I/O

L13N_1

A1

H INPUT

J

I/O

L12P_3

K

I/O

L12N_3

L VCCAUX

M

I/O

L16P_3

N

I/O

L16N_3

P

I/O

L18N_3

R

I/O

L19N_3

T GND

GND

I/O

L10P_3

LHCLK4

TRDY2

I/O

L13P_3

I/O

L14N_3

VREF_3

Â

VCCO_3

INPUT

VREF_3

ÃÃ

I/O

L18P_3

I/O

L19P_3

INPUT

I/O

L09P_3

LHCLK2

I/O

L10N_3

LHCLK5

I/O

L09N_3

LHCLK3

IRDY2

I/O

L11N_3

LHCLK7

I/O

L08P_3

LHCLK0

I/O

L11P_3

LHCLK6

I/O

L08N_3

LHCLK1

INPUT

I/O INPUT I/O VCCO_3

L13N_3

L15P_3

I/O

L14P_3

Â

I/O

L17N_3

Â

I/O

L15N_3

GND

INPUT

I/O

L17P_3 VCCINT I/O

Â

L05P_2

I/O

INPUT VCCINT L03N_2

MOSI

CSI_B

I/O

L05N_2

I/O

L01P_2

CSO_B

I/O

L01N_2

INIT_B

I/O

L03P_2

DOUT

BUSY

I/O

L06N_2

INPUT I/O VCCO_2 I/O

L02N_2 VREF_2

L06P_2

INPUT I/O

I/O VCCAUX

L02P_2 L04P_2 L04N_2

GND

GND

GND

VCCO_2

INPUT

ÃÃ

I/O

L07P_2

Â

I/O

L07N_2

Â

INPUT

L08P_2

INPUT

L08N_2

VREF_2

GND

GND

GND

I/O

L09N_2

D6

GCLK13

I/O

L09P_2

D7

GCLK12

I/O

L10P_2

D4

GCLK14

I/O

L10N_2

D3

GCLK15

GND

I/O

D5

GND GND

GND GND

GND GND

I/O

L13P_2

M0

VCCO_2

I/O

L13N_2

DIN

D0

I/O

L15N_2

I/O

L12N_2

D1

GCLK3

I/O

L15P_2

I/O

L12P_2

D2

GCLK2

I/O

L14P_2

Â

INPUT

L11N_2

M2

GCLK1

I/O

L14N_2

VREF_2

Â

INPUT

L11P_2

I/O

RDWR_B M1

GCLK0

I/O

L12N_1

A3

RHCLK7

INPUT

VCCO_1

I/O

L12P_1

A4

RHCLK6

INPUT

I/O

L07N_1

A11

INPUT

VREF_1

I/O

L10N_1

A7

RHCLK3

TRDY1

I/O

L07P_1

A12

I/O

L11N_1

A5

RHCLK5

I/O

L10P_1

A8

RHCLK2

I/O

L08N_1

VREF_1

GND

I/O

L05P_1

Â

I/O

L05N_1

Â

I/O

L06P_1

INPUT VCCINT INPUT

L17N_2

INPUT

ÃÃ

INPUT

L17P_2

I/O

I/O

L18N_2 VCCINT L03P_1

A20

Â

I/O

L16N_2

A22

I/O

L18P_2

A21

I/O

L16P_2

A23

VCCO_2

INPUT

VCCAUX ÃÃ

I/O

VREF_2

I/O

L19N_2

VS1

A18

I/O

L19P_2

VS2

A19

I/O

L20P_2

VS0

A17

I/O

L20N_2

CCLK

INPUT

I/O

L11P_1

A6

RHCLK4

IRDY1

GND

I/O

L08P_1

I/O

L06N_1

VCCO_1

I/O

L03N_1

VREF_1

Â

I/O

L02N_1

A13

I/O

L01N_1

A15

DONE

INPUT

I/O

L09N_1

A9

RHCLK1

I/O

L09P_1

A10

RHCLK0

VCCAUX

I/O

L04N_1

VREF_1

I/O

L04P_1

I/O

L02P_1

A14

I/O

L01P_1

A16

GND

Bank 2

Figure 86: FT256 Package Footprint (top view)

DS312-4_05_101805

2

CONFIG: Dedicated

configuration pins

28 GND: Ground

6 Migration Difference: For

flexible package migration,

ÃÃ use these pins as inputs.

4

JTAG: Dedicated JTAG port

pins

16

VCCO: Output voltage supply

for bank

18 Unconnected pins on

XC3S250E

(Â)

8

VCCINT: Internal core supply

voltage (+1.2V)

8

VCCAUX: Auxiliary supply

voltage (+2.5V)

200

www.xilinx.com

DS312-4 (v3.4) November 9, 2006

Product Specification

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