XC3S100E_06 Datasheet, PDF (163/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

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Pinout Descriptions
Package Overview
Table 124 shows the eight low-cost, space-saving produc-
tion package styles for the Spartan-3E family. Each pack-
age style is available as a standard and an environmentally
friendly lead-free (Pb-free) option. The Pb-free packages
include an extra ‘G’ in the package style name. For exam-
ple, the standard “VQ100” package becomes “VQG100”
when ordered as the Pb-free option. The mechanical
dimensions of the standard and Pb-free packages are simi-
lar, as shown in the mechanical drawings provided in
Table 126.
Not all Spartan-3E densities are available in all packages.
For a specific package, however, there is a common foot-
print that supports all the devices available in that package.
See the footprint diagrams that follow.
For additional package information, see UG112: Device
Package User Guide.
Table 124: Spartan-3E Family Package Options
Package
VQ100 / VQG100
CP132 / CPG132
TQ144 / TQG144
PQ208 / PQG208
FT256 / FTG256
FG320 / FGG320
FG400 / FGG400
FG484 / FGG484
Leads
Type
100 Very-thin Quad Flat Pack (VQFP)
132 Chip-Scale Package (CSP)
144 Thin Quad Flat Pack (TQFP)
208 Plastic Quad Flat Pack (PQFP)
256 Fine-pitch, Thin Ball Grid Array (FBGA)
320 Fine-pitch Ball Grid Array (FBGA)
400 Fine-pitch Ball Grid Array (FBGA)
484 Fine-pitch Ball Grid Array (FBGA)
Maximum
I/O
66
92
108
158
190
250
304
376
Lead
Pitch
(mm)
0.5
0.5
0.5
0.5
1.0
1.0
1.0
1.0
Footprint
Area (mm)
16 x 16
8.1 x 8.1
22 x 22
30.6 x 30.6
17 x 17
19 x 19
21 x 21
23 x 23
Height
(mm)
1.20
1.10
1.60
4.10
1.55
2.00
2.43
2.60
Mass⁽¹⁾
(g)
0.6
0.1
1.4
5.3
0.9
1.4
2.2
2.2
Notes:
1. Package mass is ±10%.
Selecting the Right Package Option
Spartan-3E FPGAs are available in both quad-flat pack
(QFP) and ball grid array (BGA) packaging options. While
QFP packaging offers the lowest absolute cost, the BGA
packages are superior in almost every other aspect, as
summarized in Table 125. Consequently, Xilinx recom-
mends using BGA packaging whenever possible.
Table 125: QFP and BGA Comparison
Characteristic
Maximum User I/O
Packing Density (Logic/Area)
Signal Integrity
Simultaneous Switching Output (SSO) Support
Thermal Dissipation
Minimum Printed Circuit Board (PCB) Layers
Hand Assembly/Rework
Quad Flat Pack (QFP)
158
Good
Fair
Fair
Fair
4
Possible
Ball Grid Array (BGA)
376
Better
Better
Better
Better
4-6
Difficult
DS312-4 (v3.4) November 9, 2006
www.xilinx.com
163
Product Specification