XC3S100E_06 Datasheet, PDF (222/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

Pinout Descriptions
R
FG484: 484-ball Fine-pitch Ball Grid Array
The 484-ball fine-pitch ball grid array, FG484, supports the
XC3S1600E FPGA.
Table 153 lists all the FG484 package pins. They are sorted
by bank number and then by pin name. Pairs of pins that
form a differential I/O pair appear together in the table. The
table also shows the pin number for each pin and the pin
type, as defined earlier.
An electronic version of this package pinout table and foot-
print diagram is available for download from the Xilinx web-
site at http://www.xilinx.com/bvdocs/publications/s3e_pin.zip.
Table 153: FG484 Package Pinout (Continued)
Bank
XC3S1600E
Pin Name
FG484
Ball
Type
0
IO_L12P_0
A15
I/O
0
IO_L13N_0
H14
I/O
0
IO_L13P_0
G14
I/O
0
IO_L15N_0
G13
I/O
0
IO_L15P_0
F13
I/O
0
IO_L16N_0
J13
I/O
Pinout Table
Table 153: FG484 Package Pinout
Bank
XC3S1600E
Pin Name
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO
0
IO/VREF_0
0
IO_L01N_0
0
IO_L01P_0
0
IO_L03N_0/VREF_0
0
IO_L03P_0
0
IO_L04N_0
0
IO_L04P_0
0
IO_L06N_0
0
IO_L06P_0
0
IO_L07N_0
0
IO_L07P_0
0
IO_L09N_0/VREF_0
0
IO_L09P_0
0
IO_L10N_0
0
IO_L10P_0
0
IO_L11N_0
0
IO_L11P_0
0
IO_L12N_0/VREF_0
FG484
Ball
B6
B13
C5
C14
E16
F9
F16
G8
H10
H15
J11
G12
C18
C19
A20
A21
A19
A18
C16
D16
A16
A17
B15
C15
G15
F15
D14
E14
A14
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF
I/O
I/O
VREF
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VREF
I/O
I/O
I/O
I/O
I/O
VREF
0
IO_L16P_0
0
IO_L18N_0/GCLK5
0
IO_L18P_0/GCLK4
0
IO_L19N_0/GCLK7
0
IO_L19P_0/GCLK6
0
IO_L21N_0/GCLK11
0
IO_L21P_0/GCLK10
0
IO_L22N_0
0
IO_L22P_0
0
IO_L24N_0
0
IO_L24P_0
0
IO_L25N_0/VREF_0
0
IO_L25P_0
0
IO_L27N_0
0
IO_L27P_0
0
IO_L28N_0
0
IO_L28P_0
0
IO_L29N_0
0
IO_L29P_0
0
IO_L30N_0
0
IO_L30P_0
0
IO_L32N_0/VREF_0
0
IO_L32P_0
0
IO_L33N_0
0
IO_L33P_0
0
IO_L35N_0
0
IO_L35P_0
0
IO_L36N_0
0
IO_L36P_0
0
IO_L38N_0/VREF_0
0
IO_L38P_0
0
IO_L39N_0
0
IO_L39P_0
0
IO_L40N_0/HSWAP
H13
I/O
E12
GCLK
F12
GCLK
C12
GCLK
B12
GCLK
B11
GCLK
C11
GCLK
D11
I/O
E11
I/O
A9
I/O
A10
I/O
D10
VREF
C10
I/O
H8
I/O
H9
I/O
C9
I/O
B9
I/O
E9
I/O
D9
I/O
B8
I/O
A8
I/O
F7
VREF
F8
I/O
A6
I/O
A7
I/O
A4
I/O
A5
I/O
E7
I/O
D7
I/O
D6
VREF
D5
I/O
B4
I/O
B3
I/O
D4
DUAL
222
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DS312-4 (v3.4) November 9, 2006
Product Specification