XC3S100E_06 Datasheet, PDF (124/231 Pages) Xilinx, Inc – Configurable Logic Block (CLB)

DC and Switching Characteristics
Differential I/O Standards
Internal
Logic
R
V_INP
P ^Differential
N ^{I/O Pair Pins}
V_INN
V_INN
V_INP
50%
V_ID
V_ICM
GND level
V_ICM
=
Input
common
mode
voltage
=
V_INP
+
2
V_INN
V_ID = Differential input voltage = V_INP - V_INN
DS099-3_01_012304
Figure 70: Differential Input Voltages
Table 81: Recommended Operating Conditions for User I/Os Using Differential Signal Standards
V_CCO for Drivers⁽¹⁾
V_ID
V_ICM
IOSTANDARD
Attribute
Min (V) Nom (V) Max (V)
Min
(mV)
Nom
(mV)
Max
(mV)
Min (V) Nom (V)
LVDS_25
2.375
2.50
2.625
100
350
600
0.30
1.25
BLVDS_25
2.375
2.50
2.625
100
350
600
0.30
1.25
MINI_LVDS_25
2.375
2.50
2.625
200
-
600
0.30
-
LVPECL_25⁽²⁾
Inputs Only
100
800
1000
0.5
1.2
RSDS_25
2.375
2.50
2.625
100
200
-
0.3
1.20
DIFF_HSTL_I_18
1.7
1.8
1.9
100
-
-
0.8
-
DIFF_HSTL_III_18
1.7
1.8
1.9
100
-
-
0.8
-
DIFF_SSTL18_I
1.7
1.8
1.9
100
-
-
0.7
-
DIFF_SSTL2_I
2.3
2.5
2.7
100
-
-
1.0
-
Max (V)
2.20
2.20
2.2
2.0
1.4
1.1
1.1
1.1
1.5
Notes:
1. The V_CCO rails supply only differential output drivers, not input circuits.
2. V_REF inputs are not used for any of the differential I/O standards.
124
www.xilinx.com
DS312-3 (v3.4) November 9, 2006
Product Specification