UPD78F0411GA-GAM-AX Datasheet, PDF (70/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 3 CPU ARCHITECTURE
3.4.2 Register addressing
[Function]
The general-purpose register to be specified is accessed as an operand with the register bank select flags
(RBS0 to RBS1) and the register specify codes of an operation code.
Register addressing is carried out when an instruction with the following operand format is executed. When an
8-bit register is specified, one of the eight registers is specified with 3 bits in the operation code.
[Operand format]
Identifier
r
rp
Description
X, A, C, B, E, D, L, H
AX, BC, DE, HL
‘r’ and ‘rp’ can be described by absolute names (R0 to R7 and RP0 to RP3) as well as function names (X, A, C,
B, E, D, L, H, AX, BC, DE, and HL).
[Description example]
MOV A, C; when selecting C register as r
Operation code
01100010
Register specify code
INCW DE; when selecting DE register pair as rp
Operation code
10000100
Register specify code
68
User’s Manual U18698EJ1V0UD