UPD78F0411GA-GAM-AX Datasheet, PDF (130/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
(2) Example of setting procedure when using the external main system clock
<1> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input
mode.
EXCLK
1
OSCSEL
1
Operation Mode of High-
Speed System Clock Pin
External clock input mode
P121/X1 Pin
I/O port
P122/X2/EXCLK Pin
External clock input
<2> Controlling external main system clock input (MOC register)
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
operating.
2. Set the external main system clock after the supply voltage has reached the operable
voltage of the clock to be used (see CHAPTER 27 ELECTRICAL SPECIFICATIONS
(STANDARD PRODUCTS)).
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral
hardware clock
<1> Setting high-speed system clock oscillation^Note
(See 5.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of
setting procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
<2> Setting the high-speed system clock as the main system clock (MCM register)
When XSEL and MCM0 are set to 1, the high-speed system clock is supplied as the main system clock
and peripheral hardware clock.
XSEL
MCM0 Selection of Main System Clock and Clock Supplied to Peripheral Hardware
Main System Clock (fXP)
Peripheral Hardware Clock (fPRS)
1
1
High-speed system clock (fXH)
High-speed system clock (fXH)
Caution If the high-speed system clock is selected as the main system clock, a clock other than
the high-speed system clock cannot be set as the peripheral hardware clock.
<3> Setting the main system clock as the CPU clock and selecting the division ratio (PCC register)
When CSS is cleared to 0, the main system clock is supplied to the CPU. To select the CPU clock
division ratio, use PCC0, PCC1, and PCC2.
CSS
0
PCC2
PCC1
PCC0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Other than above
CPU Clock (fCPU) Selection
fXP
fXP/2 (default)
fXP/2²
fXP/2³
fXP/2⁴
Setting prohibited
128
User’s Manual U18698EJ1V0UD