UPD78F0411GA-GAM-AX Datasheet, PDF (127/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
Figure 5-13. Clock Generator Operation When Power Supply Voltage Is Turned On
(When 1.59 V POC Mode Is Set (Option Byte: POCMODE = 0))
Power supply
voltage (VDD)
0V
1.59 V
(TYP.)
1.8 V
0.5 V/ms
(MIN.)
Internal reset signal _<1>
CPU clock
Internal high-speed
oscillation clock (fRH)
High-speed
system clock (fXH)
(when X1 oscillation
selected)
Subsystem clock (fSUB)
(when XT1 oscillation
selected)
<3> Waiting for
voltage stabilization
(1.93 to 5.39 ms)
<2>
Reset processing
(11 to 47 μ s)
Switched by
<5>
software
Internal high-speed oscillation clock
High-speed system clock
<5>
Subsystem clock
Note 1
<4>
X1 clock
oscillation stabilization time:
2¹¹/fX to 2¹⁶/fX^{Note 2}
Starting X1 oscillation _<4>
is specified by software.
Starting XT1 oscillation
is specified by software.
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
<2> When the power supply voltage exceeds 1.59 V (TYP.), the reset is released and the internal high-speed
oscillator automatically starts oscillation.
<3> When the power supply voltage rises with a slope of 0.5 V/ms (MIN.), the CPU starts operation on the
internal high-speed oscillation clock after the reset is released and after the stabilization times for the voltage
of the power supply and regulator have elapsed, and then reset processing is performed.
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 5.6.1 Example of controlling high-
speed system clock and (1) in 5.6.3 Example of controlling subsystem clock).
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
switching via software (see (3) in 5.6.1 Example of controlling high-speed system clock and (3) in 5.6.3
Example of controlling subsystem clock).
Notes 1. The internal voltage stabilization time includes the oscillation accuracy stabilization time of the internal
high-speed oscillation clock.
2. When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the
internal high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the
oscillation stabilization time counter status register (OSTC). If the CPU operates on the high-speed
system clock (X1 oscillation), set the oscillation stabilization time when releasing STOP mode using the
oscillation stabilization time select register (OSTS).
Cautions 1. If the voltage rises with a slope of less than 0.5 V/ms (MIN.) from power application until the
voltage reaches 1.8 V, input a low level to the RESET pin from power application until the
voltage reaches 1.8 V, or set the 2.7 V/1.59 V POC mode by using the option byte (POCMODE
= 1) (see Figure 5-14). By doing so, the CPU operates with the same timing as <2> and
thereafter in Figure 5-13 after reset release by the RESET pin.
2. It is not necessary to wait for the oscillation stabilization time when an external clock input
from the EXCLK pin is used.
User’s Manual U18698EJ1V0UD
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