UPD78F0411GA-GAM-AX Datasheet, PDF (303/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 12 10-BIT SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER (μPD78F041x only)
(6) Port mode register 2 (PM2)
When using the ANI0/P20 to ANI5/P25 pins for analog input port, set PM20 to PM25 to 1. The output latches of
P20 to P25 at this time may be 0 or 1.
If PM20 to PM25 are set to 0, they cannot be used as analog input port pins.
PM2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Figure 12-10. Format of Port Mode Register 2 (PM2)
Address: FF8FH After reset: 08H R/W
Symbol
7
6
PM2
1
1
5
PM25
4
PM24
3
PM23
2
PM22
1
PM21
0
PM20
PM2n
0
1
P2n pin I/O mode selection (n = 0 to 5)
Output mode (output buffer on)
Input mode (output buffer off)
ANI0/P20 to ANI5/P25 pins are as shown below depending on the settings of PF2, ADPC0, PM2, and ADS.
PF2
Digital/Analog
selection
SEG output
selection
Table 12-3. Setting Functions of P20/ANI0 to P25/ANI5 Pins
ADPC0
PM2
Analog input selection Input mode
Digital I/O selection
−
Output
mode
Input mode
Output
mode
−
ADS
P20/SEG21/ANI0 to P25/SEG16/ANI5 Pins
Does not select ANI. Analog input (not to be converted)
Selects ANI.
Analog input (to be converted by successive
approximation type A/D converter)
−
Setting prohibited
−
Digital input
−
Digital output
−
Segment output
User’s Manual U18698EJ1V0UD
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