UPD78F0411GA-GAM-AX Datasheet, PDF (111/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
Remarks 1. fX:
2. fRH:
3. fEXCLK:
4. fXH:
5. fXP:
6. fPRS:
7. fCPU:
8. fXT:
9. fSUB:
10. fRL:
X1 clock oscillation frequency
Internal high-speed oscillation clock frequency
External main system clock frequency
High-speed system clock frequency
Main system clock frequency
Peripheral hardware clock frequency
CPU clock frequency
XT1 clock oscillation frequency
Subsystem clock frequency
Internal low-speed oscillation clock frequency
5.3 Registers Controlling Clock Generator
The following eight registers are used to control the clock generator.
• Clock operation mode select register (OSCCTL)
• Processor clock control register (PCC)
• Internal oscillation mode register (RCM)
• Main OSC control register (MOC)
• Main clock mode register (MCM)
• Oscillation stabilization time counter status register (OSTC)
• Oscillation stabilization time select register (OSTS)
• Internal high-speed oscillation trimming register (HIOTRM)
(1) Clock operation mode select register (OSCCTL)
This register selects the operation modes of the high-speed system and subsystem clocks, and the gain of the
on-chip oscillator.
OSCCTL can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
User’s Manual U18698EJ1V0UD
109