UPD78F0411GA-GAM-AX Datasheet, PDF (351/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 14 SERIAL INTERFACE UART6
Figure 14-10. Format of Asynchronous Serial Interface Control Register 6 (ASICL6) (2/2)
SBL62
1
1
1
0
0
0
0
1
SBL61
0
1
1
0
0
1
1
0
SBL60
1
0
1
0
1
0
1
0
SBF transmission output width control
SBF is output with 13-bit length.
SBF is output with 14-bit length.
SBF is output with 15-bit length.
SBF is output with 16-bit length.
SBF is output with 17-bit length.
SBF is output with 18-bit length.
SBF is output with 19-bit length.
SBF is output with 20-bit length.
DIR6
0
1
MSB
LSB
First-bit specification
TXDLV6
0
1
Normal output of TXD6
Inverted output of TXD6
Enables/disables inverting TXD6 output
Cautions 1. In the case of an SBF reception error, the mode returns to the SBF reception mode. The
status of the SBRF6 flag is held (1).
2. Before setting the SBRT6 bit, make sure that bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 = 1.
After setting the SBRT6 bit to 1, do not clear it to 0 before SBF reception is completed (before
an interrupt request signal is generated).
3. The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared to 0 after SBF
reception has been correctly completed.
4. Before setting the SBTT6 bit to 1, make sure that bit 7 (POWER6) and bit 6 (TXE6) of ASIM6 =
1. After setting the SBTT6 bit to 1, do not clear it to 0 before SBF transmission is completed
(before an interrupt request signal is generated).
5. The read value of the SBTT6 bit is always 0. SBTT6 is automatically cleared to 0 at the end of
SBF transmission.
6. Do not set the SBRT6 bit to 1 during reception, and do not set the SBTT6 bit to 1 during
transmission.
7. Before rewriting the DIR6 and TXDLV6 bits, clear the TXE6 and RXE6 bits to 0.
User’s Manual U18698EJ1V0UD
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