UPD78F0411GA-GAM-AX Datasheet, PDF (445/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 17 INTERRUPT FUNCTIONS
(2) Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H)
The interrupt mask flags are used to enable/disable the corresponding maskable interrupt servicing.
MK0L, MK0H, MK1L, and MK1H are set by a 1-bit or 8-bit memory manipulation instruction. When MK0L and
MK0H, and MK1L and MK1H are combined to form 16-bit registers MK0 and MK1, they are set by a 16-bit
memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Figure 17-3. Format of Interrupt Mask Flag Registers (MK0L, MK0H, MK1L, MK1H)
Address: FFE4H After reset: FFH R/W
Symbol
<7>
6
5
MK0L
SREMK6
1
1
<4>
PMK3
<3>
PMK2
<2>
PMK1
<1>
PMK0
<0>
LVIMK
Address: FFE5H After reset: FFH R/W
Symbol
<7>
<6>
<5>
MK0H
TMMK010 TMMK000 TMMK50
<4>
TMMKH0
<3>
TMMKH1
<2>
STMK0
<1>
STMK6
<0>
SRMK6
Address: FFE6H After reset: FFH R/W
Symbol
<7>
6
<5>
MK1L
TMMK52
1
RTCMK
<4>
KRMK
<3>
TMMK51
<2>
RTCIMK
<1>
SRMK0
<0>
ADMK^Note
Address: FFE7H After reset: FFH R/W
Symbol
7
6
5
4
3
2
<1>
<0>
MK1H
1
1
1
1
1
1
MCGMK TMHMK2
XXMKX
0
1
Interrupt servicing enabled
Interrupt servicing disabled
Interrupt servicing control
Note μPD78F041x only.
Caution Be sure to set bits 5 and 6 of MK0L, bit 6 of MK1L, and bits 2 to 7 of MK1H to 1.
User’s Manual U18698EJ1V0UD
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