UPD78F0411GA-GAM-AX Datasheet, PDF (185/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
Figure 6-36. Timing Example of Free-Running Timer Mode
(CR000: Compare Register, CR010: Capture Register)
• TOC00 = 13H, PRM00 = 10H, CRC00 = 04H, TMC00 = 04H
FFFFH
TM00 register
0000H
Operable bits ₀₀
(TMC003, TMC002)
Capture trigger input
(TI000)
Compare register
(CR000)
Compare match interrupt
(INTTM000)
Capture register
(CR010)
Capture interrupt
(INTTM010)
TO00 output
Overflow flag
(OVF00)
M
01
0000H
0000H
N
M
S
N
P
S
Q
P
Q
0 write clear 0 write clear
0 write clear 0 write clear
This is an application example where a compare register and a capture register are used at the same time in the
free-running timer mode.
In this example, the INTTM000 signal is generated and the TO00 output is reversed each time the count value of
TM00 matches the set value of CR000 (compare register). In addition, the INTTM010 signal is generated and the
count value of TM00 is captured to CR010 each time the valid edge of the TI000 pin is detected.
User’s Manual U18698EJ1V0UD
183