UPD78F0411GA-GAM-AX Datasheet, PDF (244/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 8 8-BIT TIMERS H0, H1, AND H2
Figure 8-7. Format of 8-Bit Timer H Mode Register 1 (TMHMD1)
Address: FF6CH After reset: 00H R/W
TMHMD1
<7>
6
5
4
3
2
<1>
<0>
TMHE1 CKS12 CKS11 CKS10 TMMD11 TMMD10 TOLEV1 TOEN1
TMHE1
Timer operation enable
0 Stops timer count operation (counter is cleared to 0)
1 Enables timer count operation (count operation started by inputting clock)
CKS12 CKS11 CKS10
0
0
0
f ^{Note 2}
PRS
0
0
1
fPRS/2²
0
1
0
fPRS/2⁴
0
1
1
fPRS/2⁶
1
0
0
fPRS/2¹²
1
0
1
fRL/2⁷
1
1
0
fRL/2⁹
1
1
1
fRL
Count clock selection^{Note 1}
fPRS =
2 MHz
fPRS =
5 MHz
fPRS =
10 MHz
2 MHz 5 MHz 10 MHz
500 kHz 1.25 MHz 2.5 MHz
125 kHz 312.5 kHz 625 kHz
31.25 kHz 78.13 kHz 156.25 kHz
0.49 kHz 1.22 kHz 2.44 kHz
1.88 kHz (TYP.)
0.47 kHz (TYP.)
240 kHz (TYP.)
TMMD11 TMMD10
Timer operation mode
0
0 Interval timer mode
0
1 Carrier generator mode
1
0 PWM output mode
1
1 Setting prohibited
TOLEV1
0 Low level
1 High level
Timer output level control (in default mode)
TOEN1
0 Disables output
1 Enables output
Timer output control
Notes 1.
2.
If the peripheral hardware clock (fPRS) operates on the high-speed system clock (fXH) (XSEL = 1), the
fPRS operating frequency varies depending on the supply voltage.
• VDD = 2.7 to 5.5 V: fPRS ≤ 10 MHz
• VDD = 1.8 to 2.7 V: fPRS ≤ 5 MHz
If the peripheral hardware clock (fPRS) operates on the internal high-speed oscillation clock (fRH) (XSEL
= 0), when 1.8 V ≤ VDD < 2.7 V, the setting of CKS12 = CKS11 = CKS10 = 0 (count clock: fPRS) is
prohibited.
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User’s Manual U18698EJ1V0UD