UPD78F0411GA-GAM-AX Datasheet, PDF (260/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 8 8-BIT TIMERS H0, H1, AND H2
<10> By performing the procedures above, an arbitrary carrier clock is obtained. To stop the count operation,
clear TMHE1 to 0.
If the setting value of the CMP01 register is N, the setting value of the CMP11 register is M, and the count
clock frequency is fCNT, the carrier clock output cycle and duty are as follows.
• Carrier clock output cycle = (N + M + 2)/fCNT
• Duty = High-level width/carrier clock output width = (M + 1)/(N + M + 2)
Cautions 1. Be sure to set the CMP11 register when starting the timer count operation (TMHE1 = 1)
after the timer count operation was stopped (TMHE1 = 0) (be sure to set again even if
setting the same value to the CMP11 register).
2. Set so that the count clock frequency of TMH1 becomes more than 6 times the count
clock frequency of TM51.
3. Set the values of the CMP01 and CMP11 registers in a range of 01H to FFH.
4. The set value of the CMP11 register can be changed while the timer counter is
operating. However, it takes the duration of three operating clocks (signal selected by
the CKS12 to CKS10 bits of the TMHMD1 register) since the value of the CMP11
register has been changed until the value is transferred to the register.
5. Be sure to set the RMC1 bit before the count operation is started.
Remarks 1. For the setting of the output pin, see 8.3 (3) Port mode register 3 (PM3).
2. For how to enable the INTTMH1 signal interrupt, see CHAPTER 17
FUNCTIONS.
INTERRUPT
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User’s Manual U18698EJ1V0UD