English
Language : 

UPD78F0411GA-GAM-AX Datasheet, PDF (60/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents
CHAPTER 3 CPU ARCHITECTURE
3.2.2 General-purpose registers
General-purpose registers are mapped at particular addresses (FEE0H to FEFFH) of the data memory. The
general-purpose registers consists of 4 banks, each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L, and H).
Each register can be used as an 8-bit register, and two 8-bit registers can also be used in a pair as a 16-bit register
(AX, BC, DE, and HL).
These registers can be described in terms of function names (X, A, C, B, E, D, L, H, AX, BC, DE, and HL) and
absolute names (R0 to R7 and RP0 to RP3).
Register banks to be used for instruction execution are set by the CPU control instruction (SEL RBn). Because of
the 4-register bank configuration, an efficient program can be created by switching between a register for normal
processing and a register for interrupts for each bank.
Figure 3-14. Configuration of General-Purpose Registers
FEFFH
FEF8H
FEF0H
FEE8H
FEE0H
BANK0
BANK1
BANK2
BANK3
(a) Function name
16-bit processing
HL
DE
BC
AX
15
0
8-bit processing
H
L
D
E
B
C
A
X
7
0
FEFFH
FEF8H
FEF0H
FEE8H
FEE0H
58
BANK0
BANK1
BANK2
BANK3
(b) Absolute name
16-bit processing
RP3
RP2
RP1
RP0
15
0
User’s Manual U18698EJ1V0UD
8-bit processing
R7
R6
R5
R4
R3
R2
R1
R0
7
0