UPD78F0411GA-GAM-AX Datasheet, PDF (229/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50, 51, AND 52
(3) Input switch control register (ISC)
By setting ISC2 to 1, the TI52 input signal can be controlled via the TOH2 output signal.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Figure 7-12. Format of Input Switch Control Register (ISC)
Address: FF4FH After reset: 00H R/W
Symbol
7
6
5
ISC
0
0
ISC5
4
ISC4
3
ISC3
2
ISC2
1
ISC1
ISC5
ISC4
0
0
1
0
Other than above
TxD6, RxD6 input source selection
TxD6:P112, RxD6: P113
TxD6:P13, RxD6: P12
Setting prohibited
ISC3
0
1
RxD6/P113 input enabled/disabled
RXD6/P113 input disabled
RXD6/P113 input enabled
ISC2
0
1
TI52 input source control
No enable control of TI52 input (P34)
Enable controlled of TI52 input (P34)^{Note 1}
ISC1
0
1
TI000 (P33)
RxD6 (P12 or P113^{Note 2})
TI000 input source selection
ISC0
0
1
INTP0 (P120)
RXD6 (P12 or P113^{Note 2})
INTP0 input source selection
Notes 1. TI52 input is controlled by TOH2 output signal.
2. P12 or P113 is selected by ISC5 and ISC4.
0
ISC0
User’s Manual U18698EJ1V0UD
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