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UPD78F0411GA-GAM-AX Datasheet, PDF (557/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
Standard products
LCD Characteristics
(1) Resistance division method
(a) Static display mode (TA = â40 to +85°C, 1.8 V ⤠VLCD ⤠VDD ⤠5.5 V, VSS = 0 V)Note 3
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
LCD drive voltage
LCD divider resistorNote 1
LCD output resistorNote 2
(Common)
LCD output resistorNote 2
(Segment)
VLCD
RLCD
RODC
Note 3
RODS
VDD
V
60
100
150
kΩ
40
kΩ
200
kΩ
(b) 1/3 bias method (TA = â40 to +85°C, 1.8 V ⤠VLCD ⤠VDD ⤠5.5 V, VSS = 0 V)Note 3
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
LCD drive voltage
LCD divider resistorNote 1
LCD output resistorNote 2
(Common)
LCD output resistorNote 2
(Segment)
VLCD
RLCD
RODC
Note 3
RODS
VDD
V
60
100
150
kΩ
40
kΩ
200
kΩ
(c) 1/2 bias method (TA = â40 to +85°C, 1.8 V ⤠VLCD ⤠VDD ⤠5.5 V, VSS = 0 V)Note 3
1/4 bias method (TA = â40 to +85°C, 4.5 V ⤠VLCD ⤠VDD ⤠5.5 V, VSS = 0 V)Note 3
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
LCD drive voltage
LCD divider resistorNote 1
LCD output resistorNote 2
(Common)
LCD output resistorNote 2
(Segment)
VLCD
RLCD
RODC
Note 3
RODS
VDD
V
60
100
150
kΩ
40
kΩ
200
kΩ
Notes 1.
2.
3.
Internal resistance division method only.
The output resistor is a resistor connected between one of the VLC0, VLC1, VLC2 and VSS pins, and either of
the SEG and COM pins.
Set VAON based on the following conditions.
<When set to the static display mode>
⢠When 2.0V⤠VLCD ⤠VDD ⤠5.5 V: VAON = 0
⢠When 1.8V⤠VLCD ⤠VDD ⤠3.6 V: VAON = 1
<When set to the 1/3 bias method>
⢠When 2.5V⤠VLCD ⤠VDD ⤠5.5 V: VAON = 0
⢠When 1.8V⤠VLCD ⤠VDD ⤠3.6 V: VAON = 1
<When set to the 1/2 bias method>
⢠When 2.7V⤠VLCD ⤠VDD ⤠5.5 V: VAON = 0
⢠When 1.8V⤠VLCD ⤠VDD ⤠3.6 V: VAON = 1
<When set to the 1/4 bias method>
⢠When 4.5V⤠VLCD ⤠VDD ⤠5.5 V: VAON = 0
Userâs Manual U18698EJ1V0UD
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