UPD78F0411GA-GAM-AX Datasheet, PDF (112/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
Figure 5-2. Format of Clock Operation Mode Select Register (OSCCTL)
Address: FF9FH After reset: 00H R/W
Symbol
<7>
<6>
5
<4>
3
2
1
0
OSCCTL EXCLK OSCSEL
0
OSCSELS
0
0
0
0
EXCLK
0
0
1
1
OSCSEL High-speed system clock
pin operation mode
P121/X1 pin
P122/X2/EXCLK pin
0
Input port mode
Input port
1
X1 oscillation mode
Crystal/ceramic resonator connection
0
Input port mode
Input port
1
External clock input
Input port
mode
External clock input
Caution
To change the value of EXCLK and OSCSEL, be sure to confirm that bit 7 (MSTOP)
of the main OSC control register (MOC) is 1 (the X1 oscillator stops or the external
clock from the EXCLK pin is disabled).
Be sure to clear bits 0 to 3, and 5 to “0”.
Remark fXH: High-speed system clock oscillation frequency
110
User’s Manual U18698EJ1V0UD