UPD78F0411GA-GAM-AX Datasheet, PDF (168/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Figure 6-21. Example of Register Settings in External Event Counter Mode (2/2)
(e) 16-bit timer counter 00 (TM00)
By reading TM00, the count value can be read.
(f) 16-bit capture/compare register 000 (CR000)
If M is set to CR000, the interrupt signal (INTTM000) is generated when the number of external events
reaches (M + 1).
Setting CR000 to 0000H is prohibited.
(g) 16-bit capture/compare register 010 (CR010)
Usually, CR010 is not used in the external event counter mode. However, a compare match interrupt
(INTTM010) is generated when the set value of CR010 matches the value of TM00.
Therefore, mask the interrupt request by using the interrupt mask flag (TMMK010).
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User’s Manual U18698EJ1V0UD