UPD78F0411GA-GAM-AX Datasheet, PDF (517/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 24 FLASH MEMORY
24.5.3 RESET pin
If the reset signal of the dedicated flash memory programmer is connected to the RESET pin that is connected to
the reset signal generator on the board, signal collision takes place. To prevent this collision, isolate the connection
with the reset signal generator.
If the reset signal is input from the user system while the flash memory programming mode is set, the flash
memory will not be correctly programmed. Do not input any signal other than the reset signal of the dedicated flash
memory programmer.
78K0/LF3
RESET
Figure 24-8. Signal Collision (RESET Pin)
Signal collision
Dedicated flash memory
programmer connection signal
Reset signal generator
Output pin
In the flash memory programming mode, the signal output by the reset
signal generator collides with the signal output by the dedicated flash
memory programmer. Therefore, isolate the signal of the reset signal
generator.
24.5.4 Port pins
When the flash memory programming mode is set, all the pins not used for flash memory programming enter the
same status as that immediately after reset. If external devices connected to the ports do not recognize the port
status immediately after reset, the port pin must be connected to VDD or VSS via a resistor.
24.5.5 REGC pin
Connect the REGC pin to GND via a capacitor (0.47 to 1 μF: recommended) in the same manner as during normal
operation.
User’s Manual U18698EJ1V0UD
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