UPD78F0411GA-GAM-AX Datasheet, PDF (428/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 16 MANCHESTER CODE GENERATOR
16.4.3 Bit sequential buffer mode
The bit sequential buffer mode is used to output sequential signals using the MCGO pin.
(1) Register description
The MCG control register 0 (MC0CTL0), MCG control register 1 (MC0CTL1), and MCG control register 2
(MC0CTL2) are used to set the bit sequential buffer mode.
(a) MCG control register 0 (MC0CTL0)
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 10H.
Address: FF4CH After reset: 10H R/W
Symbol
<7>
6
5
<4>
3
MC0CTL0 MC0PWR
0
0
MC0DIR
0
2
<1>
<0>
0
MC0OSL MC0OLV
MC0PWR
0
1
Operation stopped
Operation enabled
Operation control
MC0DIR
0
1
MSB
LSB
First bit specification
MC0OSL
0
1
Manchester code
Bit sequential data
Data format
MC0OLV
0
1
Low level
High level
Output level when transmission suspended
Caution Clear (0) the MC0PWR bit before rewriting the MC0DIR, MC0OSL, and MC0OLV bits (it is
possible to rewrite these bits by an 8-bit memory manipulation instruction at the same
time when the MC0PWR bit is set (1)).
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User’s Manual U18698EJ1V0UD