UPD78F0411GA-GAM-AX Datasheet, PDF (164/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
Figure 6-18. Example of Register Settings for Square Wave Output Operation
(a) 16-bit timer mode control register 00 (TMC00)
TMC003 TMC002 TMC001 OVF00
0
0
0
0
1
1
0
0
Clears and starts on match
between TM00 and CR000.
(b) Capture/compare control register 00 (CRC00)
CRC002 CRC001 CRC000
0
0
0
0
0
0
0
0
CR000 used as
compare register
(c) 16-bit timer output control register 00 (TOC00)
OSPT00 OSPE00 TOC004 LVS00 LVR00 TOC001 TOE00
0
0
0
0
0/1
0/1
1
1
Enables TO00 output.
Inverts TO00 output on match
between TM00 and CR000.
Specifies initial value of TO00 output F/F
(d) Prescaler mode register 00 (PRM00)
ES101 ES100 ES001 ES000
3
0
0
0
0
0
PRM002 PRM001 PRM000
0/1
0/1
0/1
Selects count clock
(e) 16-bit timer counter 00 (TM00)
By reading TM00, the count value can be read.
(f) 16-bit capture/compare register 000 (CR000)
If M is set to CR000, the interval time is as follows.
• Square wave frequency = 1 / [2 × (M + 1) × Count clock cycle]
Setting CR000 to 0000H is prohibited.
(g) 16-bit capture/compare register 010 (CR010)
Usually, CR010 is not used for the square wave output function. However, a compare match interrupt
(INTTM010) is generated when the set value of CR010 matches the value of TM00.
Therefore, mask the interrupt request by using the interrupt mask flag (TMMK010).
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User’s Manual U18698EJ1V0UD