UPD78F0411GA-GAM-AX Datasheet, PDF (126/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
5.5 Clock Generator Operation
The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
mode (see Figure 5-1).
• Main system clock fXP
• High-speed system clock fXH
X1 clock fX
External main system clock fEXCLK
• Internal high-speed oscillation clock fRH
• Subsystem clock fSUB
• XT1 clock fXT
• Internal low-speed oscillation clock fRL
• CPU clock fCPU
• Peripheral hardware clock fPRS
The CPU starts operation when the internal high-speed oscillator starts outputting after a reset release in the
78K0/LC3, thus enabling the following.
(1) Enhancement of security function
When the X1 clock is set as the CPU clock by the default setting, the device cannot operate if the X1 clock is
damaged or badly connected and therefore does not operate after reset is released. However, the start clock of
the CPU is the internal high-speed oscillation clock, so the device can be started by the internal high-speed
oscillation clock after a reset release. Consequently, the system can be safely shut down by performing a
minimum operation, such as acknowledging a reset source by software or performing safety processing when
there is a malfunction.
(2) Improvement of performance
Because the CPU can be started without waiting for the X1 clock oscillation stabilization time, the total
performance can be improved.
When the power supply voltage is turned on, the clock generator operation is shown in Figure 5-13.
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User’s Manual U18698EJ1V0UD