UPD78F0411GA-GAM-AX Datasheet, PDF (560/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS)
Standard products
Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (TA = −40 to +85°C)
Parameter
Data retention supply voltage
Symbol
VDDDR
Conditions
MIN. TYP. MAX. Unit
1.44^Note
5.5
V
Note The value depends on the POC detection voltage. When the voltage drops, the data is retained until a POC
reset is effected, but data is not retained when a POC reset is effected.
STOP mode
Operation mode
Data retention mode
VDD
STOP instruction execution
Standby release signal
(interrupt request)
VDDDR
Flash Memory Programming Characteristics
(TA = −40 to +85°C, 2.7 V ≤ VDD ≤ 5.5 V, VSS = AVSS = 0 V)
• Basic characteristics
Parameter
VDD supply current
Erase time^{Note 1} All block
Block unit
Write time (in 8-bit units)
Number of rewrites per chip
Symbol
Conditions
IDD
Teraca
Terasa
Twrwa
Cerwr
Retention: 15 years
1 erase + 1 write after erase = 1 rewrite^{Note 2}
MIN.
1000
TYP.
4.5
20
20
10
MAX.
11.0
200
200
100
Unit
mA
ms
ms
μs
Times
Notes 1.
2.
The prewrite time before erasure and the erase verify time (writeback time) are not included.
When a product is first written after shipment, “erase → write” and “write only” are both taken as one
rewrite.
Remark fXP: Main system clock oscillation frequency
558
User’s Manual U18698EJ1V0UD