UPD78F0411GA-GAM-AX Datasheet, PDF (389/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 15 LCD CONTROLLER/DRIVER
15.6 Common and Segment Signals
Each pixel of the LCD panel turns on when the potential difference between the corresponding common and
segment signals becomes higher than a specific voltage (LCD drive voltage, VLCD). The pixels turn off when the
potential difference becomes lower than VLCD.
Applying DC voltage to the common and segment signals of an LCD panel causes deterioration. To avoid this
problem, this LCD panel is driven by AC voltage.
(1) Common signals
Each common signal is selected sequentially according to a specified number of time slices at the timing
listed in Table 15-3. In the static display mode, the same signal is output to COM0 to COM3.
In the two-time-slice mode, leave the COM2 and COM3 pins open. In the three-time-slice mode, leave the
COM3 pin open.
Use the COM4 to COM7 pins other than in the eight-time-slice mode as open or segment pins.
COM Signal
Number of
Time Slices
Static display mode
Two-time-slice mode
Three-time-slice mode
Four-time-slice mode
eight-time-slice mode
COM0
Table 15-3. COM Signals
COM1
COM2
COM3
COM4
Open
Open
Open
Note
Note
Note
Note
COM5
Note
Note
Note
Note
COM6
Note
Note
Note
Note
COM7
Note
Note
Note
Note
Note Use the pins as open or segment pins.
(2) Segment signals
The segment signals correspond to 22 bytes of LCD display data memory (FA40H to FA55H). Bits 0, 1, 2,
and 3 of each byte are read in synchronization with COM0, COM1, COM2, and COM3, respectively. If a bit is
1, it is converted to the select voltage, and if it is 0, it is converted to the deselect voltage. The conversion
results are output to the segment pins (SEG0 to SEG21).
Check, with the information given above, what combination of front-surface electrodes (corresponding to the
segment signals) and rear-surface electrodes (corresponding to the common signals) forms display patterns
in the LCD display data memory, and write the bit data that corresponds to the desired display pattern on a
one-to-one basis.
LCD display data memory bits 1 to 3, bits 2 and 3, and bit 3 are not used for LCD display in the static display,
two-time slot, and three-time slot modes, respectively. So these bits can be used for purposes other than
display.
The higher 4 bits of FA40H to FA43H are fixed to 0.
User’s Manual U18698EJ1V0UD
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