UPD78F0411GA-GAM-AX Datasheet, PDF (453/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 17 INTERRUPT FUNCTIONS
Figure 17-10. Examples of Multiple Interrupt Servicing (1/2)
Example 1. Multiple interrupt servicing occurs twice
Main processing
INTxx servicing
INTyy servicing
INTzz servicing
EI
INTxx
(PR = 1)
IE = 0
EI
INTyy
(PR = 0)
IE = 0
EI
INTzz
(PR = 0)
IE = 0
IE = 1
RETI IE = 1
RETI
IE = 1
RETI
During servicing of interrupt INTxx, two interrupt requests, INTyy and INTzz, are acknowledged, and multiple
interrupt servicing takes place. Before each interrupt request is acknowledged, the EI instruction must always be
issued to enable interrupt request acknowledgment.
Example 2. Multiple interrupt servicing does not occur due to priority control
Main processing
INTxx servicing INTyy servicing
EI
INTxx
(PR = 0)
IE = 0
INTyy
(PR = 1)
IE = 1
EI
RETI
1 instruction execution
IE = 0
IE = 1
RETI
Interrupt request INTyy issued during servicing of interrupt INTxx is not acknowledged because its priority is lower
than that of INTxx, and multiple interrupt servicing does not take place. The INTyy interrupt request is held pending,
and is acknowledged following execution of one main processing instruction.
PR = 0: Higher priority level
PR = 1: Lower priority level
IE = 0: Interrupt request acknowledgment disabled
User’s Manual U18698EJ1V0UD
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