UPD78F0411GA-GAM-AX Datasheet, PDF (361/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 14 SERIAL INTERFACE UART6
(c) Normal transmission
When bit 7 (POWER6) of asynchronous serial interface operation mode register 6 (ASIM6) is set to 1 and bit
6 (TXE6) of ASIM6 is then set to 1, transmission is enabled. Transmission can be started by writing transmit
data to transmit buffer register 6 (TXB6). The start bit, parity bit, and stop bit are automatically appended to
the data.
When transmission is started, the data in TXB6 is transferred to transmit shift register 6 (TXS6). After that,
the transmit data is sequentially output from TXS6 to the TXD6 pin. When transmission is completed, the
parity and stop bits set by ASIM6 are appended and a transmission completion interrupt request (INTST6) is
generated.
Transmission is stopped until the data to be transmitted next is written to TXB6.
Figure 14-17 shows the timing of the transmission completion interrupt request (INTST6). This interrupt
occurs as soon as the last stop bit has been output.
Figure 14-17. Normal Transmission Completion Interrupt Request Timing
1. Stop bit length: 1
TXD6 (output)
Start D0
D1
D2
D6 D7 Parity Stop
INTST6
2. Stop bit length: 2
TXD6 (output)
Start D0
D1
D2
D6
D7 Parity
Stop
INTST6
User’s Manual U18698EJ1V0UD
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