UPD78F0411GA-GAM-AX Datasheet, PDF (128/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via
software settings. The internal high-speed oscillation clock and high-speed system clock can be
stopped by executing the STOP instruction (see (4) in 5.6.1 Example of controlling high-speed
system clock, (3) in 5.6.2 Example of controlling internal high-speed oscillation clock, and (4) in
5.6.3 Example of controlling subsystem clock).
Figure 5-14. Clock Generator Operation When Power Supply Voltage Is Turned On
(When 2.7 V/1.59 V POC Mode Is Set (Option Byte: POCMODE = 1))
Power supply
voltage (VDD)
2.7 V (TYP.)
0V
Internal reset signal
<1>
CPU clock
Internal high-speed
oscillation clock (fRH)
High-speed
system clock (fXH)
(when X1 oscillation
selected)
Subsystem clock (fSUB)
(when XT1 oscillation
selected)
<3> Reset processing
(11 to 47 μs )
Internal high-speed
oscillation clock
<2>
Switched by
<5>
software
High-speed system clock
<5>
Subsystem clock
Waiting for oscillation accuracy
stabilization (86 to 361 μs ) ^<4>
X1 clock
oscillation stabilization time:
2¹¹/fX to 2¹⁶/fXNote
Starting X1 oscillation <4>
is specified by software.
Starting XT1 oscillation
is specified by software.
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
<2> When the power supply voltage exceeds 2.7 V (TYP.), the reset is released and the internal high-speed
oscillator automatically starts oscillation.
<3> After the reset is released and reset processing is performed, the CPU starts operation on the internal high-
speed oscillation clock.
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 5.6.1 Example of controlling high-
speed system clock and (1) in 5.6.3 Example of controlling subsystem clock).
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
switching via software (see (3) in 5.6.1 Example of controlling high-speed system clock and (3) in 5.6.3
Example of controlling subsystem clock).
Note
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the internal
high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC). If the CPU operates on the high-speed system clock (X1
oscillation), set the oscillation stabilization time when releasing STOP mode using the oscillation
stabilization time select register (OSTS).
Cautions 1. A voltage oscillation stabilization time of 1.93 to 5.39 ms is required after the supply voltage
reaches 1.59 V (TYP.). If the supply voltage rises from 1.59 V (TYP.) to 2.7 V (TYP.) within 1.93
ms, the power supply oscillation stabilization time of 0 to 5.39 ms is automatically generated
before reset processing.
2. It is not necessary to wait for the oscillation stabilization time when an external clock input
from the EXCLK pin is used.
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User’s Manual U18698EJ1V0UD