UPD78F0411GA-GAM-AX Datasheet, PDF (563/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 29 CAUTIONS FOR WAIT
29.2 Peripheral Hardware That Generates Wait
Table 29-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
clocks.
Table 29-1. Registers That Generate Wait and Number of CPU Wait Clocks
Peripheral
Hardware
Serial interface
UART0
Serial interface
UART6
10-bit
successive
approximation
type A/D
converter
Register
Access
Number of Wait Clocks
ASIS0
Read
1 clock (fixed)
ASIS6
Read
1 clock (fixed)
ADM
ADS
ADPC
ADCR
Write
Write
Write
Read
1 to 5 clocks (when fAD = fPRS/2 is selected)
1 to 7 clocks (when fAD = fPRS/3 is selected)
1 to 9 clocks (when fAD = fPRS/4 is selected)
2 to 13 clocks (when fAD = fPRS/6 is selected)
2 to 17 clocks (when fAD = fPRS/8 is selected)
2 to 25 clocks (when fAD = fPRS/12 is selected)
The above number of clocks is when the same source clock is selected for fCPU and fPRS. The number of wait
clocks can be calculated by the following expression and under the following conditions.
<Calculating number of wait clocks>
2 fCPU
• Number of wait clocks =
+1
fAD
* Fraction is truncated if the number of wait clocks ≤ 0.5 and rounded up if the number of wait clocks > 0.5.
fAD: A/D conversion clock frequency (fPRS/2 to fPRS/12)
fCPU: CPU clock frequency
fPRS: Peripheral hardware clock frequency
fXP: Main system clock frequency
<Conditions for maximum/minimum number of wait clocks>
• Maximum number of times: Maximum speed of CPU (fXP), lowest speed of A/D conversion clock (fPRS/12)
• Minimum number of times: Minimum speed of CPU (fSUB/2), highest speed of A/D conversion clock (fPRS/2)
Caution When the CPU is operating on the subsystem clock and the peripheral hardware clock is stopped,
do not access the registers listed above using an access method in which a wait request is issued.
Remark The clock is the CPU clock (fCPU).
User’s Manual U18698EJ1V0UD
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