UPD78F0411GA-GAM-AX Datasheet, PDF (488/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 22 LOW-VOLTAGE DETECTOR
22.2 Configuration of Low-Voltage Detector
The block diagram of the low-voltage detector is shown in Figure 22-1.
Figure 22-1. Block Diagram of Low-Voltage Detector
VDD
VDD
EXLVI/P120/
INTP0
N-ch
+
−
Internal reset signal
INTLVI
Reference
4
voltage
source
LVIS3 LVIS2 LVIS1 LVIS0
Low-voltage detection level
selection register (LVIS)
Internal bus
LVION LVISEL LVIMD LVIF
Low-voltage detection register
(LVIM)
22.3 Registers Controlling Low-Voltage Detector
The low-voltage detector is controlled by the following registers.
• Low-voltage detection register (LVIM)
• Low-voltage detection level selection register (LVIS)
• Port mode register 12 (PM12)
(1) Low-voltage detection register (LVIM)
This register sets low-voltage detection and the operation mode.
This register can be set by a 1-bit or 8-bit memory manipulation instruction.
The generation of a reset signal other than an LVI reset clears this register to 00H.
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User’s Manual U18698EJ1V0UD