UPD78F0411GA-GAM-AX Datasheet, PDF (307/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 12 10-BIT SUCCESSIVE APPROXIMATION TYPE A/D CONVERTER (μPD78F041x only)
12.4.3 A/D converter operation mode
The operation mode of the A/D converter is the select mode. One channel of analog input is selected from ANI0 to
ANI5 by the analog input channel specification register (ADS) and A/D conversion is executed.
(1) A/D conversion operation
By setting bit 7 (ADCS) of the A/D converter mode register (ADM) to 1, the A/D conversion operation of the
voltage, which is applied to the analog input pin specified by the analog input channel specification register
(ADS), is started.
When A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion result
register (ADCR), and an interrupt request signal (INTAD) is generated. When one A/D conversion has been
completed, the next A/D conversion operation is immediately started.
If ADS is rewritten during A/D conversion, the A/D conversion operation under execution is stopped and restarted
from the beginning.
If 0 is written to ADCS during A/D conversion, A/D conversion is immediately stopped. At this time, the
conversion result immediately before is retained.
Figure 12-13. A/D Conversion Operation
Rewriting ADM
ADCS = 1
Rewriting ADS
ADCS = 0
A/D conversion
ANIn
ANIn
ANIn
ANIm
Conversion is stopped
Conversion result immediately
before is retained
ANIm
Stopped
Conversion result
immediately before
is retained
ADCR,
ADCRH
ANIn
ANIn
ANIm
INTAD
Remarks 1. n = 0 to 5
2. m = 0 to 5
User’s Manual U18698EJ1V0UD
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