UPD78F0411GA-GAM-AX Datasheet, PDF (105/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 4 PORT FUNCTIONS
4.5 Settings of PFALL, PF2, PF1, ISC, Port Mode Register, and Output Latch When Using Alternate
Function
To use the alternate function of a port pin, set the port mode register and output latch as shown in Table 4-5.
Table 4-5. Settings of PFALL, PF2, PF1, ISC, Port Mode Register, and Output Latch When Using
Alternate Function (1/2)
Pin Name
Alternate Function
PFALL,
PF1
Function
I/O
PF2^{Note 4}
Name
ISC
PM××
P××
P12
KR3
Input
−
1
×
RxD0
Input
−
1
×
P13^{Note 9}
<RxD6>
KR4
Input
Input
−
ISC4 = 0,
1
×
ISC5 = 1^{Notes 5, 7}
−
PF13 = 0
1
×
TxD0
Output
−
PF13 = 1
0
×
<TxD6>
Output
−
PF13 = 1
ISC4 = 0,
0
×
ISC5 = 1
P20 to
SEG21 to Output
1
P25^{Note 2}
SEG16
×
×
ANI0 to
Input
0
ANI5^{Note 1}
1
×
P31
TOH1
Output
−
0
0
INTP3
Input
−
1
×
P32
TOH0
Output
−
0
0
MCGO
Output
−
0
0
P33
TI000
Input
−
ISC1 = 0
1
×
RTCDIV
Output
−
0
0
RTCCL
Output
−
0
0
BUZ
Output
−
0
0
INTP2
Input
−
1
×
P34
TI52
Input
−
Note 6
1
×
TI010
Input
−
1
×
TO00
Output
−
0
0
RTC1HZ
Output
−
0
0
INTP1
Input
−
1
×
P40
KR0
Input
−
VLC3^{Note 8}
Input
−
1
×
×
×
P100, P101 SEG4, SEG5 Output
1
×
×
P112
SEG6
Output
1
ISC3 = 0
×
×
TxD6
Output
0
ISC3 = 1,
0
1
ISC4 = ISC5 =
0
(Note and Remark are listed on the page after next.)
User’s Manual U18698EJ1V0UD
103