UPD78F0411GA-GAM-AX Datasheet, PDF (292/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 11 BUZZER OUTPUT CONTROLLER
(2) Port mode register 3 (PM3)
This register sets port 3 input/output in 1-bit units.
When using the P33/TI000/RTCDIV/RTCCL/BUZ/INTP2 pin for buzzer output, clear PM33 and the output
latches of P33 to 0.
PM3 is set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM3 to FFH.
Figure 11-3. Format of Port Mode Register 3 (PM3)
Address: FF23H After reset: FFH R/W
Symbol
7
6
5
4
3
2
1
0
PM3
1
1
1
PM34 PM33 PM32 PM31
1
PM3n
0
1
P3n pin I/O mode selection (n = 1 to 4)
Output mode (output buffer on)
Input mode (output buffer off)
11.4 Operations of Buzzer Output Controller
The buzzer frequency is output as the following procedure.
<1> Select the buzzer output frequency with bits 5 and 6 (BCS0, BCS1) of the clock output selection register
(CKS) (buzzer output in disabled status).
<2> Set bit 7 (BZOE) of CKS to 1 to enable buzzer output.
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User’s Manual U18698EJ1V0UD