UPD78F0411GA-GAM-AX Datasheet, PDF (102/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 4 PORT FUNCTIONS
(6) Port function register ALL (PFALL)
This register sets whether to use pins P10, P11, P14, and P15 as port pins (other than segment output pins)
or segment output pins.
PFALL is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PFALL to 00H.
Figure 4-21. Format of Port Function Register ALL (PFALL)
Address: FFB6H After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
PFALL
0
PF15ALL
PF14ALL
0
PF11ALL
PF10ALL
0
0
PFnALL
0
1
Port/segment output specification
Used as port (other than segment output)
Used as segment output
Remark n = 10, 11, 14, 15
100
User’s Manual U18698EJ1V0UD