UPD78F0411GA-GAM-AX Datasheet, PDF (58/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 3 CPU ARCHITECTURE
Figure 3-12. Data to Be Saved to Stack Memory
(a) PUSH rp instruction (when SP = FEE0H)
SP
FEE0H
SP
FEDEH
FEE0H
FEDFH Register pair higher
FEDEH Register pair lower
(b) CALL, CALLF, CALLT instructions (when SP = FEE0H)
SP
FEE0H
SP
FEDEH
FEE0H
FEDFH
FEDEH
PC15 to PC8
PC7 to PC0
(c) Interrupt, BRK instructions (when SP = FEE0H)
SP
FEE0H
SP
FEDDH
FEE0H
FEDFH
FEDEH
FEDDH
PSW
PC15 to PC8
PC7 to PC0
56
User’s Manual U18698EJ1V0UD