UPD78F0411GA-GAM-AX Datasheet, PDF (167/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
Figure 6-21. Example of Register Settings in External Event Counter Mode (1/2)
(a) 16-bit timer mode control register 00 (TMC00)
TMC003 TMC002 TMC001 OVF00
0
0
0
0
1
1
0
0
Clears and starts on match
between TM00 and CR000.
(b) Capture/compare control register 00 (CRC00)
CRC002 CRC001 CRC000
0
0
0
0
0
0
0
0
CR000 used as
compare register
(c) 16-bit timer output control register 00 (TOC00)
OSPT00 OSPE00 TOC004 LVS00 LVR00 TOC001 TOE00
0
0
0
0/1
0/1
0/1
0/1
0/1
0: Disables TO00 output
1: Enables TO00 output
Specifies initial value of
TO00 output F/F
00: Does not invert TO00 output on match
between TM00 and CR000/CR010.
01: Inverts TO00 output on match between
TM00 and CR000.
10: Inverts TO00 output on match between
TM00 and CR010.
11: Inverts TO00 output on match between
TM00 and CR000/CR010.
(d) Prescaler mode register 00 (PRM00)
ES101 ES100 ES001 ES000
3
0
0
0/1
0/1
0
PRM002 PRM001 PRM000
1
1
0
Selects count clock
(specifies valid edge of TI000).
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
User’s Manual U18698EJ1V0UD
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