UPD78F0411GA-GAM-AX Datasheet, PDF (253/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Count clock
CHAPTER 8 8-BIT TIMERS H0, H1, AND H2
Figure 8-14. Operation Timing in PWM Output Mode (1/4)
(a) Basic operation
8-bit timer counter Hn 00H 01H
A5H 00H 01H 02H
A5H 00H 01H 02H
A5H 00H
CMP0n
A5H
CMP1n
01H
TMHEn
INTTMHn
TOHn
(TOLEVn = 0)
<1>
<2>
<3>
<4>
TOHn
(TOLEVn = 1)
<1> The count operation is enabled by setting the TMHEn bit to 1. Start 8-bit timer counter Hn by masking one
count clock to count up. At this time, PWM output outputs an inactive level.
<2> When the values of 8-bit timer counter Hn and the CMP0n register match, an active level is output. At this
time, the value of 8-bit timer counter Hn is cleared, and the INTTMHn signal is output.
<3> When the values of 8-bit timer counter Hn and the CMP1n register match, an inactive level is output. At this
time, the 8-bit counter value is not cleared and the INTTMHn signal is not output.
<4> Clearing the TMHEn bit to 0 during timer Hn operation sets the INTTMHn signal to the default and PWM
output to an inactive level.
Remark n = 0 to 2, however, TOH0 and TOH1 only for TOHn
User’s Manual U18698EJ1V0UD
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