UPD78F0411GA-GAM-AX Datasheet, PDF (144/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
5.6.10 Peripheral hardware and source clocks
The following lists peripheral hardware and source clocks incorporated in the 78K0/LC3.
Table 5-10. Peripheral Hardware and Source Clocks
Source Clock
Peripheral Hardware
Peripheral
Hardware
Clock (fPRS)
Subsystem
Clock (fSUB)
Internal
Low-Speed
Oscillation
Clock (fRL)
16-bit timer/
00
event counter
Y
Y
N
8-bit timer/
50
event counter
51
Y
N
N
Y
N
N
52
Y
N
N
8-bit timer
H0
Y
N
N
H1
Y
N
Y
H2
Y
N
N
Real-time counter
Y
Y
N
Watchdog timer
N
N
Y
Buzzer output
Y
N
N
Successive approximation
Y
N
N
type A/D converter^{Note 2}
Serial interface
UART0
Y
N
N
UART6
Y
N
N
LCD controller/driver
Y
Y
Y
Manchester code generator
Y
N
N
TM50
Output
N
N
N
N
Y
N
N
N
N
N
N
Y
Y
N
N
TM52
Output
Y
N
N
N
N
N
N
N
N
N
N
N
N
N
N
TMH1
Output
N
N
Y
N
N
N
N
N
N
N
N
N
N
N
N
External Clock
from Peripheral
Hardware Pins
Y (TI000 pin)^{Note 1}
N
N
Y (TI52 pin)^{Note 1}
N
N
N
N
N
N
N
N
N
N
N
Notes 1. When the CPU is operating on the subsystem clock and the internal high-speed oscillation clock has
been stopped, do not start operation of these functions on the external clock input from peripheral
hardware pins.
2. μPD78F041x only.
Remark Y: Can be selected, N: Cannot be selected
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User’s Manual U18698EJ1V0UD