UPD78F0411GA-GAM-AX Datasheet, PDF (481/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 21 POWER-ON-CLEAR CIRCUIT
21.1 Functions of Power-on-Clear Circuit
The power-on-clear circuit (POC) has the following functions.
• Generates internal reset signal at power on.
In the 1.59 V POC mode (option byte: POCMODE = 0), the reset signal is released when the supply voltage
(VDD) exceeds 1.59 V ±0.15 V.
In the 2.7 V/1.59 V POC mode (option byte: POCMODE = 1), the reset signal is released when the supply
voltage (VDD) exceeds 2.7 V ±0.2 V.
• Compares supply voltage (VDD) and detection voltage (VPOC = 1.59 V ±0.15 V), generates internal reset signal
when VDD < VPOC.
Caution If an internal reset signal is generated in the POC circuit, the reset control flag register (RESF)
is cleared to 00H.
Remark
78K0/LC3 incorporates multiple hardware functions that generate an internal reset signal. A flag that
indicates the reset source is located in the reset control flag register (RESF) for when an internal
reset signal is generated by the watchdog timer (WDT) or low-voltage-detector (LVI). RESF is not
cleared to 00H and the flag is set to 1 when an internal reset signal is generated by WDT or LVI.
For details of RESF, see CHAPTER 20 RESET FUNCTION.
User’s Manual U18698EJ1V0UD
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