UPD78F0411GA-GAM-AX Datasheet, PDF (125/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 5 CLOCK GENERATOR
5.4.3 When subsystem clock is not used
If it is not necessary to use the subsystem clock for low power consumption operations, or if not using the
subsystem clock as an I/O port, set the XT1 and XT2 pins to Input port mode (OSCSELS = 0) and independently
connect to VDD or VSS via a resistor.
Remark OSCSELS:
Bit 4 of clock operation mode select register (OSCCTL)
5.4.4 Internal high-speed oscillator
The internal high-speed oscillator is incorporated in the 78K0/LC3. Oscillation can be controlled by the internal
oscillation mode register (RCM).
After a reset release, the internal high-speed oscillator automatically starts oscillation (8 MHz (TYP.)).
5.4.5 Internal low-speed oscillator
The internal low-speed oscillator is incorporated in the 78K0/LC3.
The internal low-speed oscillation clock is only used as the clock of the watchdog timer, 8-bit timer H1, and LCD
controller/driver. The internal low-speed oscillation clock cannot be used as the CPU clock.
“Can be stopped by software” or “Cannot be stopped” can be selected by the option byte. When “Can be stopped
by software” is set, oscillation can be controlled by the internal oscillation mode register (RCM).
After a reset release, the internal low-speed oscillator automatically starts oscillation, and the watchdog timer is
driven (240 kHz (TYP.)) if the watchdog timer operation is enabled using the option byte.
5.4.6 Prescaler
The prescaler generates various clocks by dividing the main system clock when the main system clock is selected
as the clock to be supplied to the CPU.
User’s Manual U18698EJ1V0UD
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