UPD78F0411GA-GAM-AX Datasheet, PDF (187/564 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00
Figure 6-38. Timing Example of Free-Running Timer Mode
(CR000: Capture Register, CR010: Capture Register) (1/2)
(a) TOC00 = 13H, PRM00 = 50H, CRC00 = 05H, TMC00 = 04H
FFFFH
TM00 register
0000H
M
N
S
A
B
C
D
Operable bits
(TMC003, TMC002)
00
01
Capture trigger input
(TI000)
Capture register
(CR010)
0000H
M
N
S
Capture interrupt
(INTTM010)
Capture trigger input
(TI010)
Capture register
(CR000) ^0000H
A
B
C
Capture interrupt
(INTTM000)
Overflow flag
(OVF00)
P
Q
E
P
Q
D
E
0 write clear 0 write clear 0 write clear
0 write clear
This is an application example where the count values that have been captured at the valid edges of separate
capture trigger signals are stored in separate capture registers in the free-running timer mode.
The count value is captured to CR010 when the valid edge of the TI000 pin input is detected and to CR000 when
the valid edge of the TI010 pin input is detected.
User’s Manual U18698EJ1V0UD
185